1. Field of the Invention
The present invention relates to a delay device capable of managing the delay time thereof which can not be accurately defined otherwise, and more particularly to a delay device for delaying a pulse signal using the gate delay in an integrated circuit. The present invention also relates to a phase detector for a pulse signal and a clock generator using the above delay device.
2. Description of the Prior Art
In digital circuit design, frequently, a digital signal such as a pulse signal is delayed by a minute time period in such an arrangement of multi-stage connection of non-inverter TTL (Transistor Transistor Logic) gates having a relatively stabilized delay characteristic.
In JP-A-58-220588 (Reference No. 1), the above arrangement is applied to the clock generator for a time base corrector. In the time base corrector, it is important to provide a high phase accuracy of a generated clock with respect to an input video signal. In view of this, in the above clock generator, the generated clock is applied to a pulse delay device in multi-stage connection of non-inverter gates to prepare several kinds of clocks having different phases; the clock having the most coincident phase with the input video signal is selected among these clocks to prepare the clock with high phase accuracy.
If such a circuit arrangement is designed discretely using TTL devices, unevenness of the delay time thus generated is negligibly small. On the other hand, if this circuit is designed in an integrated circuit comprising CMOS's, the unevenness is noticeably large; this is very problematic.
Most of the gate arrays or standard cells in the latest digital integrated circuits are designed using CMOS's. However, CMOS has a defect that its gate delay characteristic is greatly influenced by a power supply voltage, environmental temperature, or electrical load. It has been generally believed that it is impossible to take a constant delay time using gate delay in the digital integrated circuit.
Meanwhile, disclosed in the proceedings (Reference No. 2) for the 1989 national conference of the institute of television engineers of Japan is a method of positively using the changing characteristic of a power supply voltage versus a gate delay time to provide a circuit for controlling the power supply voltage, thereby controlling the delay time so that it is maintained constant. However, in the case of an application of an integrated circuit, it is very difficult to control the power supply voltage within the integrated circuit.
The most common technique of detecting the phase of a pulse signal was to use a charge pumping circuit (to change a phase difference into a voltage) in an analog circuit design. However, to implement it in a digital integrated circuit was difficult for the above reason.
Further, in a clock generator used to generate e.g. a color subcarrier in a
system, it is difficult in terms of the synchronization accuracy of the clock to phase-modulate a horizontal synchronization signal to directly generate the color subcarrier. In view of this, it was proposed in JP-A-54-44431 (Reference No. 3) to generate the color subcarrier using a technique such as digital phase modulation.